基于数据选择器和D触发器的多输入时序电路设计  

Design of Data Multi-input Sequential Logic Circuit Based on Data Multiplexer and D Flip-flop

作　　者：任骏原[1] 

机构地区：[1]渤海大学,辽宁锦州121000

出　　处：《现代电子技术》2010年第12期10-12,共3页Modern Electronics Technique

摘　　要：为了探索多输入时序逻辑电路的简便实现方法,介绍了基于数据选择器和D触发器的多输入时序逻辑电路设计技术。即将D触发器和数据选择器进行组合,用触发器的现态作为数据选择器选择输入变量、数据选择器的输出函数作为触发器的D输入信号,构成既有存储功能又有数据选择功能的多输入端时序网络。由触发器的现态选择输入变量、所选择的输入变量决定触发器的次态转换方向。该方法适合实现互斥多变量时序逻辑电路,且在设计过程中不需要进行函数化简。The design technique of multi-input sequential logic circiut based on multiplexer and D flip-flops is introduced to investigate a simple method to realize the multi-input sequential logic circiut, which D flip-flops are ＇combined with multiplexer. Taking the present states as the data multiplexer to select input variables and the output functions of the data multiplexer as the input signals of D flip-flops, the multi-input sequential network with the functions o{ storage and selection is composed. The input variables are selected according to the present states of D flip-flops, the transformation direction of the next states of D flip-flops is determined by the selected variables. The combination of these two components is suitable to the realization of the mutual exclusion multi-variable sequential logic circuit. The function simplification is unnecessary in design process. This is a new method to design sequential logic circuits.

关 键 词：D触发器 数据选择器 时序网络 多输入时序逻辑电路 

分 类 号：TP331.1[自动化与计算机技术—计算机系统结构]