基于FPGA和布尔差分的某型雷达电路故障诊断  

Fault Diagnosis for Certain Type of Radar Circuit Based on FPGA and Boolean Difference Calculus

作　　者：周俊杰[1] 常硕[1] 王德功[1] 祁晓明空军航空大学航空控制工程系 

机构地区：[1]空军航空大学航空电子工程系,长春130022

出　　处：《吉林大学学报（信息科学版）》2010年第3期314-319,共6页Journal of Jilin University（Information Science Edition）

摘　　要：为解决求解布尔差分异或运算量大的问题,针对高速实时数据处理的需要,提出了用现场可编程门阵列(FPGA:Field Programmable Gate Array)实现故障测试码生成的方法,并阐述了用该方法对某型机载雷达电路进行故障诊断的全过程。通过仿真结果得出,采用48 MHz的时钟,对八输入的电路生成全部测试码只需43μs,尤其是对较复杂电路,优势更为明显,为实现该雷达的快速故障诊断提供了一条新思路。Boolean difference calculation have many Exclusive OR operation.To resolve this problem and to meet the requirement of high speed data processing,using FPGA（Field Programmable Gate Array） to generate the test set has been proposed and the whole process of fault diagnosis for a certain type of radar circuit based on this method is explained.The simulation results show that the time needed for generating the whole test set is 43 μs when the clock pulse frequency is 48 MHz and the numbers of circuit input are eight.When the input is multiple,it can save more time,it is a new way for diagnosing the fault of this radar rapidly.

关 键 词：布尔差分 测试码 现场可编程门阵列 故障诊断 

分 类 号：TP206[自动化与计算机技术—检测技术与自动化装置]