全数字QAM解调器的设计与FPGA实现  

A Design and Implementation of Full Digital QAM Demodulator

作　　者：张华冲[1] 王晓亚[1] 

机构地区：[1]中国电子科技集团公司第五十四研究所,河北石家庄050081

出　　处：《无线电工程》2010年第6期27-30,共4页Radio Engineering

摘　　要：正交幅度调制(QAM)是一种频谱利用率较高的调制方式。分析了影响解调性能的主要因素以及解决方法,提出了一种QAM解调器的全数字实现结构。介绍了符号同步环路的构成,在设计中采用FARROW结构立方内插器,内插控制器为内插器提供控制变量,对内插控制器的实现进行了详细介绍,定时误差提取采用Gardner算法。采用结合均衡的载波恢复混合结构,显著提高了载波恢复的性能。所设计的解调器可以应用于通信、侦察接收机中。Quadrature Amplitude Modulation （QAM） is a kind of modulation modes with high utilization ratio of frequency spectrum.In the paper,the influence of frequency offset and channel distortion on demodulator is analyzed.A design and implementation of full digital QAM demodulator is presented.The realization of timing synchronization is introduced in detail.A high performance cubic interpolation filter is adopted.The interpolation controller is a key unit,which decides the instant and the group of input data of interpolator.Symbol timing error is detected by Gardner Algorithm.The demodulator achieves high performance by using a joint architecture of carrier synchronization and equalization.The design is implemented in XILINX FPGA,and it can be applied to demodulation for communication or reconnaissance receiver.

关 键 词：全数字接收机 内插滤波器 符号同步 

分 类 号：TN911[电子电信—通信与信息系统]