数字电视传输系统中LDPC编码器及实现  

Implementation of LDPC Encoder Based on Digital Television Terrestrial Broadcasting System Standard

作　　者：李兴旺[1] 周亮[1] 

机构地区：[1]电子科技大学通信抗干扰国家重点实验室,四川成都610054

出　　处：《通信技术》2010年第5期1-3,共3页Communications Technology

摘　　要：数字电视地面广播传输系统标准中的前向纠错编码(FEC),是由BCH码和LPDC码级联组成,其中BCH为外码,LDPC码为内码。以0.4、0.6、0.8这三种码率为研究对象,主要研究LDPC编码器的设计及其FPGA实现,标准中的LDPC码是一种准循环LDPC码。LDPC码的生产矩阵是通过子矩阵的循环移位得到的,为了便于存储把循环移位得到的矩阵存储到ROM中。然后通过Virtex-4芯片,利用ISE仿真平台进行了测试、综合、仿真并得到综合报告,通过与计算机仿真结果进行比较,验证其设计正确性。The FEC code of Digital Television Terrestrial Broadcasting System Standard is concatenated by BCH code and LDPC code.BCH code is used as inner code,and LDPC code as outer code.This paper analyzes and studies the LDPC encoder,including FPGA implementation and focusing on three rates,of 0.4,0.6,and 0.8.LDPC code in system standard is quasi-cyclic LDPC code,and the generator matrix is obtained by cyclic shift of sub-matrix,and for ease of storage,the cyclic shift matrix is stored in ROM.Through Virtex-4 chip and by using ISE,the test,synthesis and simulation on the encoder are done,and the comprehensive report is thus obtained.The computer simulation proves the validity of the design.

关 键 词：数字电视 前向纠错 低密度奇偶校验码 准循环低密度奇偶校验码 

分 类 号：TN941.3[电子电信—信号与信息处理]