Evaluation and Analysis of Packet-Length Effect on Networks-on-Chip  

作　　者：金德鹏 林世俊 苏厉 周郭飞 曾烈光 

机构地区：[1]Department of Electronic Engineering,Tsinghua University [2]Department of Communication Engineering,Xiamen University

出　　处：《Tsinghua Science and Technology》2010年第3期288-293,共6页清华大学学报（自然科学版（英文版）

基　　金：Supported by the National Natural Science Foundation of China(No. 90607009);the National High-Tech Research and Development (863) Program of China (No. 2008AA01Z107);the Na-tional Key Basic Research and Development (973) Program of China (No. 2007CB310701)

摘　　要：The network-on-chip （NoC） design methodology is an important trend for large system-on-chip designs to reduce the bandwidth and power constraints in traditional synchronous bus architectures. In the design of packet-based NoC, the packet-length plays an important role in the NoC throughput, latency, and energy consumption. The appropriate NoC packet-length was selected based on simulation and analysis of the packet-length effect on NoC for variable average data block length （ADBL） configuration parameters. A trade-off curve among throughput, latency, and energy consumption was developed and shows that the optimum packet length increases as the ADBL increases.The network-on-chip （NoC） design methodology is an important trend for large system-on-chip designs to reduce the bandwidth and power constraints in traditional synchronous bus architectures. In the design of packet-based NoC, the packet-length plays an important role in the NoC throughput, latency, and energy consumption. The appropriate NoC packet-length was selected based on simulation and analysis of the packet-length effect on NoC for variable average data block length （ADBL） configuration parameters. A trade-off curve among throughput, latency, and energy consumption was developed and shows that the optimum packet length increases as the ADBL increases.

关 键 词：NETWORK-ON-CHIP SYSTEM-ON-CHIP packet-length effect MP-SoC 

分 类 号：TN402[电子电信—微电子学与固体电子学]