一种基于多目标约束的互连线宽和线间距优化模型  

An optimization model of wire size for multi-objective constraint

作　　者：朱樟明[1] 万达经[1] 杨银堂[1] 

机构地区：[1]西安电子科技大学微电子学院,西安710071

出　　处：《物理学报》2010年第7期4837-4842,共6页Acta Physica Sinica

基　　金：国家自然科学基金(批准号:60725415;60971066);国家高技术研究发展计划(批准号:2009AA01Z258;2009AA01Z260)资助的课题~~

摘　　要：优化线宽和线间距已经成为改善系统芯片性能的关键技术.本文基于互连线线宽和线间距对互连延时、功耗、面积和带宽的影响,提出了基于多目标优化方法实现优化线宽和线间距的思路,并利用曲线拟合方法得到了多目标约束的解析模型.Hspice验证结果显示,该解析模型精度较高,平均误差不超过5%,算法简单,能有效弥补应用品质因数方法的缺陷,可以应用于纳米级互补金属氧化物半导体系统芯片的计算机辅助设计.The optimization of wire size has become a key technology for improving the chip system performance.Based on the influence of the wire size of interconnects on the delay,power,area and bandwidth,we propose an idea of optimal wire size based on multi-objective optimization method and obtain a multi-objective constrained analytical model by curve-fitting approach.The Hspice verification shows that the analytical model presented in this paper has a high precision and the average error is less than 5%.The algorithm is simple and can effectively compensate for deficiencies in application of quality factor approach and it can be applied to computer-aided design of nano-scale complementary metal-oxide semiconductor（CMOS） system chips.

关 键 词：多目标约束 曲线拟合 互连线尺寸 纳米级集成电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]