射频CMOS低噪声放大器输入匹配网络的研究与设计  

Research and Design of Input Matching Network of RF CMOS LNA

作　　者：尹玉军[1] 李震涛[1] 

机构地区：[1]南京信息职业技术学院电子信息学院,南京210046

出　　处：《中国新通信》2010年第13期51-54,共4页China New Telecommunications

摘　　要：本文对低功耗射频CMOS低噪声放大器的输入匹配网络进行了研究。采用台积电TSMC0.18μmCMOS工艺模型,通过ADS电路仿真软件对设计的低噪声放大器电路进行了优化设计和仿真,仿真结果表明在2.4GHz中心工作频率下,该低噪声放大器满足射频接收机的系统要求,它的噪声系数NF约为2.57dB,增益S21约为16.2dB,输入反射系数S11约为-13.3dB,输出反射系数S22约为-21.9dB。电路的输入匹配和输出匹配情况良好。Optimum design of input matching network of CMOS Low-Noise Amplifiers （LNA） for low-power applications is discussed in this paper. The LNA is designed in TMIC 0.18 μm CMOS process and been simulated and verified with ADS（Advanced Design System）. According to the result of simulations, the low noise amplifier fulfills the demand of the RF receiver system. The amplifier works well centered at 2.4GHz frequency. NF （Noise Figure） of 2.57dB, gain （S21） of 16.2dB, S11 of- 13.3dB, S22 of-21. 9dB are achieved. The circuit achieves good impedance matching both at input and output.

关 键 词：射频 低噪声放大器 输入匹配 

分 类 号：TN722.3[电子电信—电路与系统]