基于FPGA的实验室常用芯片测试仪  

Chip Tester Based on FPGA Commonly Used in Laboratory

作　　者：巫新民[1] 任艳频[1] 秦俭[1] 陈莉平[1] 阎捷[1] 任勇[1] 

机构地区：[1]清华大学信息科学技术学院,北京100084

出　　处：《半导体技术》2010年第7期637-639,共3页Semiconductor Technology

摘　　要：针对电子技术实验无法进行多芯片同时测试的问题,提出了一种基于FPGA和上下位机联动配置技术的智能式多芯片测试方案。该方案实现了同一插槽测试不同芯片和集成电路测试台上多个芯片同时测试的功能。介绍了Verilog硬件描述语言编程下载和上位机控制方法与实现技术,有效解决了实验室常用芯片中不同类型芯片电源管脚上电的难题,利用FPGA器件实现了低功耗和系统可再编程升级,对于提高高校电子技术基础实验的水平和效率具有重要的实用价值。Based on FPGA technology and upper and lower linkage configuration technology,a kind of multi-chip smart test instrument is described,which could help to solve the problem that multi-chip can＇t be tested at the same time in electronic experiment.The test of different chips in the same location and multi-chip testing simultaneously on IC tester is realized.Programming and download of Verilog hardware description language and upper and lower linkage configuration technology are introduced,which provide an effective solution to power supply on pins for different type chips.Making use of FPGA devices,a low power consumption and system upgrade through of re-programming are achieved,which has an important practical value to improve the level and efficiency of basic electronic experiment in colleges and universities.

关 键 词：多芯片测试 现场可编程门阵列 上位机 智能控制 

分 类 号：TN407[电子电信—微电子学与固体电子学]