全流水FFT处理器的VLSI设计与实现  

VLSI Design and Implementation of Fully Pipelined FFT Processor

作　　者：张奇惠[1] 邓浩[1] 赵海斌 

机构地区：[1]河南大学物理与电子学院,河南开封475004 [2]开封供电公司,河南开封475004

出　　处：《河南大学学报（自然科学版）》2010年第4期349-352,共4页Journal of Henan University:Natural Science

基　　金：国家自然科学基金资助项目(10804027)

摘　　要：提出了一种适用于OFDM系统的快速全流水FFT处理器结构.考虑时域抽取(DIT)和频域抽取(DIF)算法的有限字长效应,采用DIF算法.首先对FFT碟形变换的复乘法进行简化,然后提出相应的流水线碟形处理单元(BPE),最后采用0.13μm1.08 V CMOS工艺实现了64点基2 DIF FFT处理器.综合结果显示,该处理器能够工作在200 MHz,面积和功耗分别为2.9 mm2和15 mW.提出的全流水FFT处理器能够广泛应用于WALN、DVB-T、ADSL以及其它基于OFDM的多载波系统.A fast and fully pipelined architecture of FFT processor customized for OFDM-based communication systems is presented.For the finite word length effects consideration of Decimation In Time（DIT） and Decimation In Frequency（DIF） algorithms,and DIF algorithm is selected.A simplification of the complex multiplication is performed by an improved algorithm,and then a pipelined Butterfly Processing Element（BPE） is described accordingly.Finally,a VLSI implementation of 64-point radix-2 DIF FFT processor is carried out with a 0.13 μm 1.08V CMOS technology.Synthesis results show the designed FFT processor can operate at 200 MHz,the estimated area and power consumption are only about 2.9mm^2 and 15mW,respectively.The proposed fully pipelined FFT processor can be suitably applied in WALN,DVB-T,ADSL and other OFDM-based multicarrier systems.

关 键 词：FFT 全流水 OFDM VLSI 

分 类 号：TN47[电子电信—微电子学与固体电子学]