一种应用于GNSS接收机的新型低功耗高速预分频  

A New Low-Power High-Speed Prescaler in GNSS Receivers

作　　者：于云丰[1] 马成炎[2] 叶甜春[1] 

机构地区：[1]中国科学院微电子研究所,北京100029 [2]杭州中科微电子有限公司,杭州310053

出　　处：《电子与信息学报》2010年第7期1752-1755,共4页Journal of Electronics & Information Technology

基　　金："核高基"重大专项(2009ZX01031-002-008);国家863计划项目(2007AA12Z344)资助课题

摘　　要：该文设计了一款应用于全球卫星导航系统(GNSS)接收机射频芯片的基于新型源耦合锁存器结构的预分频,用于产生接收机所需要的本振信号。与传统的静态源耦合逻辑锁存器相比,新结构引入一个钟控晶体管,可实现在采样期间减小锁存器的时间常数,有效地提高了最高工作频率,并且扩展了工作频率范围。通过建立一个简单但有效的小信号模型,新结构的优点被详细阐述。实验结果显示,该预分频最高频率可达6.9GHz,消耗电流仅为1.2mA。该预分频在0.18μmCMOS工艺上实现,已成功应用于GNSS接收机射频芯片中。A new prescaler based on new Source Coupled Logic（SCL） latch is proposed in this paper,supplying Local Oscillator（LO） for receivers.Compared to traditional static SCL latch,a clock-controlling transistor is added to reduce the time constant at sensing time,and as a result,the maximum operating frequency increases and the operating range is enlarged.A simple but to some extent accurate small signal model for this new architecture is developed,and the advantages of new design are described in detail.This prescaler＇s maximum operating frequency can reach to 6.9 GHz when its current is only 1.2 mA.The prescaler is manufactured in 0.18 μm CMOS process,and it has been successfully applied to GPS receivers.

关 键 词：全球卫星导航系统 源耦合逻辑 预分频 本振 

分 类 号：TN772[电子电信—电路与系统]