多处理器片上系统中实时自适用仲裁器的设计与分析  

Design and Performance Analysis of Adaptive Real time Arbiter for On-chip Shared Bus Multi-processor SoC

作　　者：陈利平[1] 高金华[1] 

机构地区：[1]湖南工学院计算机与信息科学系,衡阳421002

出　　处：《微处理机》2010年第3期6-10,共5页Microprocessors

基　　金：2006年湖南省自然科学基金资助项目(06JJ5135)

摘　　要：多处理器片上系统在单芯片上集成了多种指令集处理器,可完成复杂完整的功能。通信架构是多处理器片上系统的瓶颈,而高效的仲裁器可以解决多个处理器同时访问共享资源引起的冲突和竞争,从而防止系统性能的下降。提出一种实时动态自适应仲裁器,它既可以考虑实时要求,又可以自动调节各个处理器占据的总线带宽,避免饥饿现象。基于多处理器仿真平台的实验结果显示它比传统的仲裁器减少了49%的延迟时间,并且能更好地控制各处理器的总线带宽。Muhiprocessor system - on - chip integrated a variety of instruction set processors in a single chip, to be completed by the complexity of fully functional, multiproeessor communication framework is the bottleneck of system -on -chip, and efficient arbiter solve the conflict and competition of the resources to share by multi processors, thereby preventing a decline in system performance. In this paper, a real - time dynamic adaptive arbitration, it can be considered real - time requirements, and it can be automatically adjusted each processor bus bandwidth occupied, to avoid hunger. Multi - processor simulation platform based on the experimental results show that it arbiter than the traditional 49% reductionof the delay time, and to better control the processor bus bandwidth.

关 键 词：多处理器片上系统 仲裁器 lottery总线 ATM交换机制 

分 类 号：TP302.2[自动化与计算机技术—计算机系统结构]