视频采集系统中控制单元的CPLD设计  

Implementation of controlling module in image capture system based on CPLD

作　　者：燕思嘉[1] 刘环鹏[1] 

机构地区：[1]黑龙江省电子信息产品监督检验院,哈尔滨150090

出　　处：《信息技术》2010年第7期126-129,共4页Information Technology

摘　　要：目前的视频采集处理系统中,专用的视频解码器得到了广泛的应用。但是这种解码器不能和直接被通用的存储设备利用,所以对这种芯片的使用通常都要借助可编程逻辑器件CPLD或FPGA。详细介绍了一个基于视频解码器和CPLD的视频采集系统,该系统具有高效率和低功耗特点。着重介绍了CPLD的VHDL程序设计的优化技术原则,经过优化设计,本系统的CPLD宏资源消耗率最少。Nowadays,the specific video sampling device is widely used in video sampling systems.But this kind of device has some disadvantages,it can＇t be connected to the universal SRAM and processor.So,all of this kind of slug should use CPLD and FPGA to achieve their function.This paper describes a video signal acquisition system which is based on video decoder and CPLD.On the foundation of this,it discusses on the specific ways to reduce the consumption ratio of macrocells of CPLD,and finally gives the principle of optimizing the VHDL program.

关 键 词：视频采集 SAA7111A CPLD VHDL优化 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]