基于FPGA的电子钟设计与实现  

Design and Implementation of Digital-Clock Based on FPGA

作　　者：赵文来[1] 杨俊秀[1] 严国红[1] 陈秋妹[1] 

机构地区：[1]浙江理工大学信息电子学院,杭州310018

出　　处：《浙江理工大学学报（自然科学版）》2010年第4期590-594,共5页Journal of Zhejiang Sci-Tech University(Natural Sciences)

摘　　要：针对现行电子钟设计方案实现起来相对复杂、误差偏大等弊端,对以FPGA为核心器件的电子钟方案进行了实验研究,利用EDA技术自顶向下的设计方法,设计电子钟各模块及相应具体电路,通过编译、仿真,并下载到FPGA实验平台进行测试,运行结果表明:系统能以较小的误差显示时、分、秒,并且当走时不准时,可以通过相应设置键实现校时。Aiming at the drawbacks of the current design plan for clocks such as being relatively complex and too large margins of errors,the new design plan is researched with experiment based on the core of the FPGA device,Each module and circuit scheme diagram is designed in this paper with the top-down method in EDA technology,by editing,compiling,simulating and device programming,files are downloaded to the platform of FPGA for testing.The results show that system can not only display the hour,miniute,second with smaller margin of error,but also ajust time with the key of mode and set.

关 键 词：电子钟 FPGA EDA 仿真 下载 

分 类 号：TN702[电子电信—电路与系统]