MCS-51单片机中软时钟设计的优化方法  

Optimization Methods of Soft-clock Design in MCS-51 Single Chip Computer

作　　者：张乐芳[1] 庞新法[2] 黄天录[3] 

机构地区：[1]西安欧亚学院信息工程学院,陕西西安710065 [2]中共陕西省委党校信息中心,陕西西安710061 [3]西安通信学院,陕西西安710106

出　　处：《现代电子技术》2010年第15期187-189,共3页Modern Electronics Technique

摘　　要：根据MCS-51单片机内部定时计数器的特点,提出一种通过对定时计数器中断间隔时间进行累加的软时钟设计方法,并在此基础上提出通过改变时间处理方式的进一步优化方法。此方法不仅简化了程序设计,节省了硬件开销,而且提高了电脑时钟的定时精度,具有广泛的应用价值。A soft-clock design method cumulative with timing counter interruptive interval is proposed according to the characteristics of the timing counter in MCS-51 single chip computer.On this basis,a further optimization method to accumulate the interruptive interval time of the timing counter is put forward.This method not only simplifies the program design and reduces the hardware costs but also improves the clock timing accuracy of the computer.Therefore,it has a very wide range of applications.

关 键 词：单片机 软时钟 定时计数器 计数器中断间隔 优先级 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]