基于DVB-H标准的RS译码器算法与FPGA实现  

Algorithm and implemention with FPGA of RS decoder based on DVB-H

作　　者：周国良[1] 王波[2] 

机构地区：[1]中国船舶重工集团公司江苏自动化研究所,江苏连云港222006 [2]哈尔滨理工大学,黑龙江哈尔滨150001

出　　处：《电子技术应用》2010年第8期66-69,共4页Application of Electronic Technique

摘　　要：介绍了符合DVB-H标准的RS(204,188)码的参数与译码算法,给出了一种用于求解关键方程的改进型无逆BM算法,使用Verilog语言完成了基于该算法的译码器设计与实现。测试结果表明,该译码系统性能优良,在节约硬件资源的同时满足了高速处理的需要。The parameters and decoder algorithm of RS（204,188） according to DVB-H specification is introduced.It is given that the reformulated inversionless algorithm which is used to solve the key equation.The decoder based on this algorithm is designed and implemented with Verilog HDL.As test results shown,decoder described in this paper decrease resource usage in a great deal at high speed.

关 键 词：reed—solomon码 DVB-H FPGA 

分 类 号：TN919[电子电信—通信与信息系统]