高速SDRAM控制器的嵌入式设计  

Embedded Design of High-speed SDRAM Controller

作　　者：邓耀华[1,2] 刘桂雄[1] 吴黎明[2] 

机构地区：[1]华南理工大学机械与汽车工程学院,广州510643 [2]广东工业大学信息工程学院,广州510006

出　　处：《计算机工程》2010年第16期216-218,共3页Computer Engineering

基　　金：粤港关键领域重点突破基金资助项目(20080102-5)

摘　　要：为适应高数据吞吐速率的应用场合,在分析同步动态随机存储器(SDRAM)控制器工作原理的基础上,研究支持高数据处理效率可连续读写操作的存储控制算法。利用现场可编程门阵列设计SDRAM嵌入式存储控制器,采用CMD命令形式,根据猝发长度分配连续读写延时,通过数据通道控制与读写操作协同工作提高数据处理效率。测试结果表明,该控制器运行频率高于100 MHz,数据处理效率大于95%,适用于视频采集数据缓存及大型LED显示控制中。To meet the demands of application situation of mass data throughput,this paper researches memorizing control algorithm which supports high treatment efficiency and data continuous read/write operation,and uses Field Programmable Gate Array（FPGA） to design SDRAM embedded control algorithm.The controller uses CMD order mode,assigns time-delay of continuous read/write based on burst length,enhances the data processing efficiency by team working between data channel control and read/write operation.Testing results show that running frequency of this controller is higher than 100 MHz,data processing efficiency is above 95%,and it applies to data buffer of video acquisition and large size display control of LED.

关 键 词：同步动态随机存储器 现场可编程门阵列 连续读写指令 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]