低功耗能量回收时钟发生器和触发器的设计  

Design of Low-power Energy Recovery Clock Generator and Flip-flop

作　　者：蔡艳慧[1] 方赟[1] 钟传杰[1] 

机构地区：[1]江南大学信息工程学院,江苏无锡214122

出　　处：《电视技术》2010年第8期46-49,共4页Video Engineering

基　　金：科技部技术创新基金(07C26223201317)

摘　　要：在深入研究能量回收和门控时钟技术的基础上,提出了能量回收时钟发生器和触发器的新型设计方案。该方案在SMIC0.35μm CMOS标准工艺下,利用Spectre软件进行仿真。仿真结果表明,采用能量回收技术后,新型结构的功耗比传统结构下降约42%;采用门控时钟技术后,新型结构的功耗比传统结构下降约65%。The new energy recovery clock generator and flip-flop are proposed based on the research on energy recovery and clock gating techniques.In the SMIC 0.35 μm CMOS standard process,the new structure is simulated by use of Spectre software.The results show that compared with the traditional methods,power consumption is reduced by 42% by means of energy recovery technology and reduced by 65% by means of clock gating techniques.

关 键 词：低功耗技术 时钟分配网络 能量回收 门控时钟技术 触发器 

分 类 号：TP331[自动化与计算机技术—计算机系统结构]