一种正交数字下变频器的高效改进结构  

An efficiently improved structure for quadrature digital down converter

作　　者：叶和忠[1] 刘倍圣[1] 曾亚军[1] 徐节涛[1] 赵利[1] 

机构地区：[1]桂林电子科技大学,广西桂林541004

出　　处：《电子设计工程》2010年第9期186-189,共4页Electronic Design Engineering

基　　金：广西研究生教育创新计划资助项目(2009105950810M12);2008年国家大学生创新性实验计划资助项目(ZZC0801)

摘　　要：针对传统正交数字下变频器结构计算效率低,首先介绍一种基于混频器后置的改进方法,该方法只能使得计算效果提高1/2N,接着在此基础上利用多相滤波法对混频器后置法进行进一步改进,从而大大减少了数字下变频器的运算量,使得计算效率提高了K倍。最后对上述各种正交数字下变频方法进行算法仿真和计算效率分析对比,结果表明经过混频器后置法与多相滤波法综合改进后的数字正交下变频算法计算效率高,实现效果良好。In order to improve computational efficiency of classic quadrature digital down converter, a traditional structure for quadrature digital down converter modified by method of post-mixer is analysed, computational efficiency of which raises only 1/2N. Based on post-mixer, quadrature digital down converter is further improved by using polyphase filtering. The computation is reduced significantly and calculation efficiency raises K times. At last, computer simulation demonstrates the efficiency and feasibility of the combined method of post-mixer and ployphase filtering.

关 键 词：数字正交下变频 混频器后置 多相滤波 抽取滤波器 

分 类 号：TN911.72[电子电信—通信与信息系统]