基于并行DSP的实时ISAR成像系统设计  

Design of Real-Time ISAR Imaging System Based on Parallel DSP

作　　者：王瑞君[1] 邱兆坤[1] 黎湘[1] 李东泽[1] 

机构地区：[1]国防科技大学电子科学与工程学院,湖南长沙410073

出　　处：《雷达科学与技术》2010年第4期306-311,共6页Radar Science and Technology

摘　　要：介绍了一种基于并行DSP的高速实时ISAR成像系统。为实现高速实时信号处理,基于DSP+FPGA的结构和CPCI总线技术设计实现系统硬件平台,然后对ISAR实时成像算法进行分析,将其映射到硬件平台,给出了成像算法工作流程,并分析说明了DSP的优化设计,最后将该系统用于实际的雷达数字信号处理并给出了实时成像结果。试验证明,该系统发挥了DSP的优势,具有运算能力强、接口方便等特点,能够实现目标的实时ISAR成像,最高成像频率达到4帧/秒。In this paper,a high speed real-time ISAR imaging system based on parallel DSP is presented.To achieve high-speed real-time signal processing,hardware platform is implemented based on DSP＋FPGA structure and CPCI bus technology.The ISAR real-time imaging algorithm is then analysed and mapped into the hardware platform,the optimization of DSP design is explained in detail.At last,the system is used to process real radar digital signals and the real-time imaging results are given.The experiments show that the system fully plays the advantage of the DSP and is featured by strong computing power and easy interface.The system is capable of achieving the goal of real-time ISAR imaging of target with the imaging rate up to 4 frames per second.

关 键 词：数字信号处理 并行设计 实时性 逆合成孔径雷达成像 

分 类 号：TN957.5[电子电信—信号与信息处理] TN958[电子电信—信息与通信工程]