ARM反编译中指令解码器的设计与实现  

Design and implementation of decoder in decompiling for ARM architecture

作　　者：殷文建[1] 蒋烈辉[1] 尹青[1] 周丽娜[1] 李继中[1] 

机构地区：[1]解放军信息工程大学信息工程学院,河南郑州450002

出　　处：《计算机工程与设计》2010年第17期3747-3749,3753,共4页Computer Engineering and Design

基　　金：国家863高技术研究发展计划基金项目(2007AA01Z483)

摘　　要：针对反编译中传统的基于机器SLED描述以及基于语言文法分析的二进制代码指令解码技术复杂、难于移植等缺点,提出了基于IDA Pro的ARM指令解码器的设计思想。该指令解码器在分析IDA Pro内部数据表示的基础上,扩展定义了指令操作数类型及其线性字符串表示,设计连接器提取指令的各语义要素,并且提出了基于静态分支转移的递归算法构建控制流图。实验结果表明,生成结构化汇编结果文件可以有效支持ARM反编译的后续工作。Aiming at the complexity and poor portability of traditional decoding technologies for binary executable based on machine SLED or based on syntax analysis in decompilation,a design thought of ARM decoder is proposed.On the basis of inner data representation in IDA Pro,the operand type for ARM architecture and its linear string representations are extendedly defined.A connector is designed to extract semantic factors of instruction and also a recursive algorithm based on static branch jumps is described to create CFG of certain procedure.Experiments show that the structured assembly file generated by the decoder can be used to support the next step decompilation working effectively.

关 键 词：反编译 指令解码器 连接器 结构化汇编表示 控制流图 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]