低速率语音编解码专用芯片的设计  

ASIC design for low bit rate speech coding

作　　者：贾志科[1] 崔慧娟[1] 唐昆[1] 冯重熙[1] 

机构地区：[1]清华大学电子工程系

出　　处：《清华大学学报（自然科学版）》1999年第5期73-76,共4页Journal of Tsinghua University(Science and Technology)

基　　金：国家"八六三"高技术项目

摘　　要：为了满足可视电话系统对高质量，低成本语音编解码器的需要，采用数字信号处理器内核（ＤＳＰＣｏｒｅ）的方法，设计了符合ＩＴＵ－ＴＧ．７２３．１建议的５．３ｋｂｉｔ／ｓ和６．３ｋｂｉｔ／ｓ双速率语音编解码器专用芯片。针对Ｇ．７２３．１算法特点，进行算法优化，如变卷积运算为加／减运算，避开求余运算等，并对需要最大运算量的情况作了模拟，保证语音编解码器在最坏情况下也能正常工作。根据专用芯片的结构，设计了编解码器的流程和接口模块，用较少的运算量和较小的存储空间，实时实现了Ｇ．７２３．１建议及其附录Ａ的全部功能和选项，并通过了全套测试序列的检验，而且留出足够多的资源实现自适应回声抵消、调制解调等其它功能。In order to get a high quality and low cost speech coder for videophone system, an ASIC (Application Specific Integrated Circuit) was designed using DSP core. The speech coder complies with ITU T Recommendation G.723.1 (dual rate speech coder for multimedia communications transmitting at 5.3 & 6.3[KG5x]kbit/s) . According to the features of the G.723.1 algorthm and the architecture of the ASIC, some optimizations were used to reduce the computation complex and the memory size. The worst case which would cost maximum computation amount was simulated to ensure the coder can work properly in this case. The chart of the coder and its performance were presented. There is still enough resource left in this ASIC to implement the MODEM and the echo cancellator.

关 键 词：低速率语音编码 芯片 可视电话 语音编码 解码 

分 类 号：TN912.3[电子电信—通信与信息系统] TN916.6[电子电信—信息与通信工程]