基于FPGA的诱发电位仪系统设计  

Design of Evoked Potential System Based on FPGA

作　　者：谢宏[1] 李刚[1] 姚楠[1] 夏斌[1] 

机构地区：[1]上海海事大学信息工程学院

出　　处：《现代电子技术》2010年第19期172-175,共4页Modern Electronics Technique

基　　金：上海市科技创新行动计划项目(09511502500);西部交通建设科技项目(2010318810019)资助

摘　　要：设计了基于FPGA的诱发电位仪完整系统。首先给出了整个诱发电位仪的总体设计,讨论了FPGA作为主芯片的各模块集成设计,在此基础上论述了ADS1258模/数转换芯片的特点并给出了其与FPGA的接口电路设计。该诱发电位仪系统设计具有可靠性高,通用性和扩展性好等优点,并且具有非常重要的应用价值和良好的市场前景。A FPGA-based evoked potential system is designed. The overall design of the evoked potential instrument is given. The integrated design of each module which takes FPGA as the main chip is discussed. On the basis of the integrated design, the characteristic of analog-to-digital conversion chip ADS1258 is discoursed and the circuit design of the interface connecting the chip with FPGA is presented. The design of the evoked potential system possesses the advantages of high reliabili- ty, versatility and sealability, and has a great application value and good market prospect.

关 键 词：诱发电位仪 FPGA ADS1258 接口电路 

分 类 号：TN919-34[电子电信—通信与信息系统]