接近和低于0.1μm的MOS硅集成电路技术  

Technology for MOS Silicon Integrated Circuits with a Design Rule of Near 0.1μm and Below 0.1μm

作　　者：郭士东[1] 

机构地区：[1]东北微电子研究所,沈阳110032

出　　处：《微处理机》1999年第2期6-9,共4页Microprocessors

摘　　要：本文主要述评了接近和低于 0 .1 μm的 MOS硅集成电路技术面临的挑战。重点论述了晶体管结构、阈值电压调整。This paper comments mainly technology challenges for silicon integrated circuits with a design rule of near 0.1μm and below 0.1μm.This paper elaborates hot-spots problems with the emphasis on transistor structures,the adjustment of the threshold voltage,interconnect issues and photoetching technology etc.

关 键 词：MOS硅集成电路 MOS-FET 集成电路 制造工艺 

分 类 号：TN432.05[电子电信—微电子学与固体电子学]