航空相机高速JPEG编码器的设计  

A Design of high-speed JPEG encoder of Aerial Camera

作　　者：唐垚[1,2] 刘波[3] 曹剑中[2] 

机构地区：[1]中国科学院西安光学精密机械研究所,西安710119 [2]中国科学院研究生院,北京100039 [3]中国科学院空间科学与应用研究中心,北京100190

出　　处：《微计算机信息》2010年第29期134-136,共3页Control & Automation

摘　　要：提出一种高分辨率航空数码相机的高速JPEG编码器的设计。针对图像分辨率高、处理速度快的特点,以FPGA结合大容量片外存储器,运用乒乓结构和流水线结构。采用FPGA片上乘法单元构建两级并行1D-DCT模块实现高速、低延时2D-DCT变换的方法,并优化了JPEG算法流程。给出了详细的优化流程和实现方法,对设计结果进行了仿真和FPGA验证。结果表明,该设计具有较高的性能,可适应高分辨率和高速航空图像JPEG压缩的性能要求。A high-speed JPEG encoder of large resolution CCD aerial camera was developed. For the features of high resolution andhigh speed,large memory outside FPGA and ping -pong framework was used. To implementing a high speed and low latency 2D -DCT module,a method use on chip multiplier to construct 2-steps parallel 1D-DCT was introduced. The process of JPEG was opti-mized and the design was Simulated and validated on FPGA. The result of experiment indicates that the design work very well andcan meet the performance of large resolution and high speed JPEG compressing.

关 键 词：图像压缩 航空数码相机 JPEG FPGA 

分 类 号：TP751.1[自动化与计算机技术—检测技术与自动化装置]