基于CK-Core的处理器SDIO接口主控制器设计  

Design of SDIO host controller of CK-Core based processor

作　　者：车向勇[1] 薛念[1] 潘赟[1] 严晓浪[1] 

机构地区：[1]浙江大学超大规模集成电路设计研究所,浙江杭州310027

出　　处：《机电工程》2010年第10期85-89,共5页Journal of Mechanical & Electrical Engineering

基　　金：国家高技术研究发展计划("863"计划)资助项目(2009AA011706)

摘　　要：作为具有自主知识产权的国产嵌入式CPU核,CK-Core系列处理器核已广泛应用于嵌入式各领域。为满足基于CK-Core内核的处理器芯片的各类应用需求,需开发功能强大的芯片外围扩展接口。介绍了一种具有广阔应用前景的片外扩展接口,即SDIO接口。在分析了SDIO接口工作原理的基础上,开发了基于CK-Core的处理器SDIO接口主控制器IP核。利用RVM方法进行硬件RTL代码功能验证,通过CKSOC开发平台完成了FPGA原型验证,同时给出了DC综合结果。实验结果表明,该自行开发的IP核工作正常,性能良好,有效提高了CK-Core处理器的外围扩展能力。As a domestic embedded CPU core of proprietary intellectual property rights,CK-Core has been widely used in various situations.In order to meet various application needs of CK-Core based processors,more powerful peripheral interfaces are required.A kind of peripheral extension interface was introduced,which has a bright future for application-SDIO interface.Based on the analysis of the SDIO specification,a SDIO Host Controller IP of CK-Core based processor was developed.The IP verification was done under RVM platform and also FPGA platform.The design was synthesized in Synopsys DC.The results indicate that this self-developed IP has been reasonably designed and works well,which improves the peripheral extension capability of the CK-Core based processor.

关 键 词：CK-Core SDIO接口 设计 验证 

分 类 号：TP3[自动化与计算机技术—计算机科学与技术] TN402[电子电信—微电子学与固体电子学]