A versatile 16-channel front-end integrated circuit for semiconductor radiation detectors  

作　　者：ZHANG Yacong CHEN Zhongjian LU Wengao AN Huiyao JIN Ye JI Lijiu 

机构地区：[1]Key Laboratory of Microelectronie Devices and Circuits, Institute of Microelectronics, Peking University, 100871, China [2]Institute of Electronics, Peking University, 100871, China

出　　处：《Nuclear Science and Techniques》2010年第2期118-122,共5页核技术（英文）

基　　金：Supported by the National Natural Science Foundation of China (No.40704025)

摘　　要：A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M (double-poly-quad-metal) CMOS technology with an area of 2.5×1.54 mm2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC–1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.A CMOS front-end integrated circuit consisting of 16 identical analog channels is proposed for semiconductor radiation detectors. Each of the 16 channels has a low noise charge sensitive amplifier, a pulse shaper, a peak detect and hold circuit and a discriminator, while analog voltage and channel address are routed off the chip. It can accommodate both electron and hole collection with selectable gain and peaking time. Sequential and sparse readout, combining with self-trigger and external trigger, makes four readout modes. The circuit is implemented in a 0.35 μm DP4M （double-poly-quad-metal） CMOS technology with an area of 2.5× 1.54 mm^2 and power dissipation of 60 mW. A single channel chip is tested with Verigy 93000. The gain is adjustable from 13 to 130 mV·fC^-1 while the peaking time varies between 0.7 and 1.6 μs. The linearity is more than 99% and the equivalent noise charge is about 600e.

关 键 词：辐射探测器 集成电路 16通道 半导体 前端 电荷灵敏放大器 CMOS技术 模拟通道 

分 类 号：TN402[电子电信—微电子学与固体电子学] TL81[核科学技术—核技术及应用]