一种指令特性可扩展的汇编器体系结构  

ARCHITECTURE OF AN ASSEMBLER WITH INSTRUCTION FEATURE EXTENSIBLE

作　　者：齐歆瑜[1] 陈章龙[1] 涂时亮[1] 

机构地区：[1]复旦大学计算机科学技术学院,上海200433

出　　处：《计算机应用与软件》2010年第10期255-257,共3页Computer Applications and Software

摘　　要：对嵌入式处理器的汇编器进行讨论,提出一种指令特性可扩展的汇编器体系结构。在这种体系结构下能有效地加入新的指令或是改进已有指令的功能,并根据此体系结构为汇编器加入两条编译预处理命令。采用该体系结构的汇编器,能够有效降低汇编器的开发维护难度,同时能够增加汇编程序的编写效率。In this paper we discuss the embedded processor＇s assembler,and present a new assembler architecture with instruction feature extensible.It is easy to add new instructions or modify the function of instructions in such architecture.Then two compiling pre-processing directives are added to assembler according to this architecture.Assemblers with such kind of architecture can effectively reduce the difficulty of their development and maintenance,and enhance the efficiency of programming the assembly program.

关 键 词：汇编器 指令特性可扩展 编译预处理 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]