数字量输入模块的设计  

Design of Digital Inputting Module

作　　者：杨小平[1] 文丰[1] 隋晓峰[1] 

机构地区：[1]中北大学电子科学与技术系仪器科学与动态测试教育部重点实验室,山西太原030051

出　　处：《计算机测量与控制》2010年第11期2625-2628,共4页Computer Measurement &Control

基　　金：微小型高速运动体的激光主动制导与探测技术研究(60871041)

摘　　要：数字量输入模块是某通用测试台的一部分;其主要功能是接收遥测PCM码流,并对其进行解码,为后续的传输存储做准备;该设计涉及同步时钟和异步时钟的PCM解码的实现,并对解码过程中的误差问题进行了分析和说明;模块采用FPGA作为中心逻辑控制器,可以对几种电平形式的遥测PCM码进行解码,具有较强的通用性;该设计已经应经成功的应用于某通用测试台。The digital inputting module is a part of the universal measurement set.The main function is to receive and decode the telemetry PCM which are prepared for the following storage.The design includes the implement of decoding of PCM which is synchronized clock or asynchronous clock.There also are the introduction and analysis of the error in the process of decoding in the design.The module use FPGA as the central logic controller,which could decode telemetry PCM which have different level type.So it has better commonality.The design has been applied successfully to the some universal measurement set.

关 键 词：PCM FPGA 同步解码 异步解码 

分 类 号：TN431.2[电子电信—微电子学与固体电子学]