流水线CORDIC算法的FPGA实现  

Implementation of Pipelined CORDIC based on FPGA

作　　者：王亚春[1] 蔡德林[2] 张梦龙[1] 王俊[1] 

机构地区：[1]安徽大学电子科学与技术学院,安徽合肥230039 [2]中国电子科技集团第38研究所,安徽合肥200031

出　　处：《通信技术》2010年第11期169-171,共3页Communications Technology

摘　　要：坐标旋转计算机(CORDIC)算法可以将多种难以用硬件电路直接实现的复杂运算分解为统一的简单移位、加法运算,然后逐次逼近结果。这种方法很好地兼顾了精度、速度和硬件复杂度,因而在数字信号处理领域得到了广泛应用。首先简要介绍了CORDIC算法的原理,然后基于现场可编程门阵列(FPGA)实现了流水线结构的CORDIC算法,仿真结果表明,其输出误差很小,与理论值基本一致。CORDIC can convert the complex operations,which are hard to be directly implemented by hardware circuit,into the simple adding and shift operations,then gradually approach the exact result.It keeps balance between precision,speed and hardware complexity,and thus is widely used in the digital signal processing field.The author first gives the principle of CORDIC,then the implementation of pipelined CORDIC based on FPGA.The results indicate that the output errors are minor and the simulation results are fairly accorded with the theoretical value.

关 键 词：CORDIC 现场可编程门阵列 流水线 

分 类 号：TN911.4[电子电信—通信与信息系统]