一种改进的扫描电路测试压缩方法  

An Improved Approach to Test Compaction Based on Limited Scan

作　　者：张旭[1] 刘煜坤[2] 张旭辉[2] 张礼勇[2] 

机构地区：[1]哈尔滨理工大学电工电子教学与实训中心,哈尔滨150080 [2]哈尔滨理工大学测控技术与仪器黑龙江省高校重点实验室,哈尔滨150080

出　　处：《电测与仪表》2010年第11期71-75,共5页Electrical Measurement & Instrumentation

基　　金：黑龙江省教育厅科学研究项目(100551Z0007)

摘　　要：提出了一种改进扫描电路测试压缩方法。首先,通过基于向量删除的测试压缩去除测试序列中的冗余向量;其次,用消耗时钟较少的有限扫描操作代替全扫描操作,合并测试序列内部测试向量,减少测试时间;最后,采用启发式方法限制候选测试对数量,降低计算复杂度,加速测试压缩过程。基准电路实验结果表明,相同故障覆盖率下,该方法降低测试时间效果十分显著。According to the problem of the significant increasing testing time and testing cost of circuit caused by the significant increasing of testing vectors,this paper proposes an improved approach to test compaction for scan circuits that uses limited scan instead of full scan operations between test pairs firstly,and applies the vector omission method secondly.Finally,heuristic methods are introduced to limit the number of candidite test pairs,reduce the computational complexity and speed up the test compaction procedure.Experiment result of benchmark circuits shows that the test time of the proposed method is much less than the conventional methods.

关 键 词：测试时间 有限扫描 测试压缩 启发式方法 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]