一种高效IEEE802.15.4解调电路设计  

Efficient demodulation circuit design for IEEE802.15.4

作　　者：罗奥[1] 尹首一[1] 刘雷波[1] 魏少军[1] 

机构地区：[1]清华大学微电子所,北京100084

出　　处：《电子技术应用》2010年第12期99-102,110,共5页Application of Electronic Technique

基　　金：国家科技重大专项(2009ZX03006-004);国家行业科专项(200903010)

摘　　要：介绍了一种高效低成本的IEEE 802.15.4接收机基带解调电路的设计。不同于传统的频率补偿的方案,通过最大似然估计的方法导出了解调算法,完成了算法仿真,并据此设计了简单高效的解调电路。硬件仿真表明,该解调器在复杂度方面类似于传统的非相干解调,而在性能方面有约5.1 dB的提升,硬件门数2.39万。This paper presented an efficient, low-cost circuit for IEEE802.15.4 baseband demodulator. Instead of using the traditional frequency offset compensation scheme, this work directly employed the maximum likelihood estimation method and the demodulation algorithm was derived. According to the algorithm, a simple and area efficient hardware architecture was designed and simulated. The result shows that this demodulator has almost the same complexity as the traditional non-coherent methods, but it has 5.1 dB performance improvement, with a hardware cost of only 23.9 K gates.

关 键 词：最小频移键控 解调算法 直接序列扩频 

分 类 号：TN914.3[电子电信—通信与信息系统]