基于模块级流水和并行处理的CAVLC编码器实现  

CAVLC Encoder Implementation Based on Module Level Pipeline and Parallel Process

作　　者：陆伊[1] 杨爱良[1] 章宇东[1] 

机构地区：[1]中国航空无线电电子研究所,上海200233

出　　处：《航空电子技术》2010年第4期33-36,共4页Avionics Technology

摘　　要：基于上下文的自适应变长编码(CAVLC)是高清视频压缩标准H.264的关键模块。CAVLC编码器设计的优劣直接影响系统实时性。本文设计的编码器整体采用模块级流水线架构,关键子模块内部采用并行处理,提高了实时性。设计在Xilinx公司的xc5vlx330t芯片上实现,综合后时钟频率可达222MHz。视频数据的实际测试显示,编码器可满足系统实时性需求。Context-based Adaptive Variable Length Coding （CAVLC） is a key module of H.264, the HD video compression standard. The design of CAVLC encoder has a direct effect on system real-time. A promotion on real-time is achieved by a module level pipeline architecture used on the entire encoder and a parallel process used in key sub-module. The design is implemented on xcSvlx330t chip of Xilinx corp.; the frequency can reach 222 MHz after synthesis. Actual test of video data presents that the system real-time could be satisfied.

关 键 词：CAVLC 模块级流水 并行处理 

分 类 号：TN919.3[电子电信—通信与信息系统]