基于动态可重构FPGA的容错技术研究  

Research on the Fault-Tolerant Techniques Based on Dynamic Reconfigurable FPGA

作　　者：张超[1] 刘峥[1] 赵伟[1] 

机构地区：[1]西安电子科技大学雷达信号处理国家重点实验室,陕西西安710071

出　　处：《电子科技》2011年第1期102-105,108,共5页Electronic Science and Technology

基　　金：陕西省自然科学基础研究计划基金资助项目(SJ08S19)

摘　　要：针对重构文件的大小、动态容错时隙的长短、实现的复杂性、模块间通信方式、冗余资源的比例与布局等关键问题进行了分析。并对一些突出问题,提出了基于算法和资源多级分块的解决方法,阐述了新方法的性能,及其具有的高灵活性高、粒度等参数可选择、重构布线可靠性高、系统工作频率有保障的优点。This paper analyzes several methods in the aspects of size of reconfigurations, reconfiguration inter- val, implement complexity, inter-module communication, routing and proportion of spare resources. To solve some main problems, we have proposed a method based on the multiple division of algorithm and resources and analyzed its performance. This method is flexible and some parameters like granularity are optional. Routing of reconfiguration is reliable and can ensure the operation frequency of the system.

关 键 词：容错 动态重构 RETIMING STARS 

分 类 号：TP311.53[自动化与计算机技术—计算机软件与理论]