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机构地区:[1]State Key Laboratory of ASIC & System Fudan University
出 处:《Journal of Semiconductors》2011年第1期79-84,共6页半导体学报(英文版)
基 金:Project supported by the State Key Laboratory of ASIC & System,China
摘 要:An ultra-low power 12 bits 2 kS/s successive approximation register analog-to-digital converter (ADC) is presented. For power optimization, the voltage supply of the digital part is lowered, and the offset voltage of the latch is self-calibrated. Targeted for better linearity and lower noise, an improved digital-to-analog converter capacitor array layout strategy is presented, and a low kick-back noise latch is proposed. The chip was fabricated by using 0.18μm 1P6M CMOS technology. The ADC achieves 61.8 dB SNDR and dissipates 455 nW only, resulting in a figure of merit of 220 fJ/conversion-step. The ADC core occupies an active area of only 674 ×639μm2.An ultra-low power 12 bits 2 kS/s successive approximation register analog-to-digital converter (ADC) is presented. For power optimization, the voltage supply of the digital part is lowered, and the offset voltage of the latch is self-calibrated. Targeted for better linearity and lower noise, an improved digital-to-analog converter capacitor array layout strategy is presented, and a low kick-back noise latch is proposed. The chip was fabricated by using 0.18μm 1P6M CMOS technology. The ADC achieves 61.8 dB SNDR and dissipates 455 nW only, resulting in a figure of merit of 220 fJ/conversion-step. The ADC core occupies an active area of only 674 ×639μm2.
关 键 词:ADC SAR low power biopotential acquisition system
分 类 号:TN792[电子电信—电路与系统] P631.43[天文地球—地质矿产勘探]
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