基于高速嵌入式系统的信号完整性分析  

Signal integrity analysis of high speed embedded system

作　　者：郭土华[1] 徐晓[1] 

机构地区：[1]华南理工大学理学院,广东广州510640

出　　处：《电子技术应用》2011年第1期55-57,61,共4页Application of Electronic Technique

摘　　要：提高信号完整性、减小串扰和反射是高速电路系统设计能否成功的关键。本文基于以ARM1176JZF-S S3C6410为核处理器的嵌入式开发系统,对高速电路进行了研究。通过信号完整性仿真分析,解决了DDR SDRAM差分时钟信号的反射问题和视频输出信号的串扰问题。Trying the best to reduce signal reflection and crosstalk is a critical step of whether the high speed circuit system design can succeed or not. This paper is based on the processor S3C6410 of ARMl176JZF-S core for the research of high speed circuit of embedded system. By the simulation of signal integrity analysis, the reflection problems of DDR SDRAM differential clock signal and the crosstalk problems of video output signal are solved.

关 键 词：信号完整性 S3C6410 差分时钟信号 仿真 

分 类 号：TN702[电子电信—电路与系统]