基于DSP Builder的伪随机序列发生器设计及FPGA实现  

A DSP builder-based pseudo-random sequence and its FPGA implementation

作　　者：杨东[1] 王建业[1] 

机构地区：[1]空军工程大学导弹学院,陕西三原713800

出　　处：《微型机与应用》2011年第2期96-99,共4页Microcomputer & Its Applications

摘　　要：简要分析了伪随机序列中应用广泛的m序列,Gold序列及平衡Gold码的概念、原理和应用。提出了一种基于Altera的DSP Builder工具箱的伪随机序列产生器设计方法,并通过设计实例,说明这种方法在简化设计难度、提高设计速度和灵活性等方面的优点和应用价值。并提出了其仿真和FPGA实现的基本方法。This text synopsisly analyzed the concept,principle and application of the m sequence,the Gold sequence and the equilibrium Gold code in the pseudo-random sequence.It put forward a designing way of pseudo-random sequence which based on the tool box of DSP builder in the Altera,and explained the advantages and values on simplifying the designing difficulty and advancing the designing speed and vivid through a solid example. It also put forward the basic method of imitating and carring out with FPGA.

关 键 词：DSP BUILDER M序列 GOLD序列 平衡Gold码 

分 类 号：TP331.1[自动化与计算机技术—计算机系统结构]