基于FPGA的915MHz射频读卡器设计  

Design of 915 MHz radio frequency reader based on FPGA

作　　者：杨碧华[1] 文张斌[2] 

机构地区：[1]暨南大学信息科学技术学院,广东广州510632 [2]暨南大学信息技术研究所,广东广州510075

出　　处：《微型机与应用》2011年第3期22-25,29,共5页Microcomputer & Its Applications

基　　金：国家自然科学基金项目(60505018);广东省自然科学基金项目(8451063201000361)

摘　　要：参照ISO/IEC 18000-6 Type B协议设计了一款工作频率为915 MHz的射频读卡器,采用FPGA完成协议中规定的数字信号处理,C8051F020单片机作为主控器。利用Verilog HDL硬件描述语言,搭建FPGA内部各个小模块及系统的验证平台,选用Altera公司Cyclone系列的EP1C6Q240C8芯片为目标器件,使用Quartus Ⅱ进行综合,并通过时序和功能验证。实验结果表明,该读卡器符合ISO/IEC 18000-6 Type B协议要求,具有结构灵活、体积小、升级容易等优点。Based on ISO/IEC 18000-6 Type B protocol,a 915 MHz RFID reader was designed.FPGA was used to process the digital signal that was based on the protocol and C8051F020 was used as the controller.Each module in FPGA and verification module were designed by Verilog HDL.They were synthesized by Quartus II with EP1C6Q240C8 CMOS chip of the Altera as the target device,and they were verified on both timing and function.The result showed that it could satisfy the technology index of ISO/IEC18000-6 Type B requests and possesses the advantages of flexible structure,small size,easily upgrading and so on.

关 键 词：射频识别 读卡器 FPGA C8051F020 

分 类 号：TP338.1[自动化与计算机技术—计算机系统结构]