用于以太网物理层时钟同步PLL的VCO设计  被引量:1

Design of VCO Used for Clock Synchronization PLL of Ethernet Physical Layer

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作  者:李良[1] 张涛[1] 

机构地区:[1]武汉科技大学信息科学与工程学院,湖北武汉430081

出  处:《现代电子技术》2011年第2期161-163,共3页Modern Electronics Technique

摘  要:研究了一种基于以太网物理层时钟同步的高带宽低噪声压控振荡器(VCO),该VCO采用交叉耦合的电流饥饿型环形振荡器,通过级联11级环路电路和改善其控制电压变换电路,优化了VCO的输出频率范围以及降低了输出时钟的相位噪声,完全满足以太网物理层芯片时钟电路的性能指标。基于TSMC3.3V0.25μmCMOS工艺的仿真结果表明,中心频率为250MHz时,压控增益为300MHz/V,其线性区覆盖范围是60~480MHz,在偏离中心频率600kHz处的相位噪声为-108dBc。A wide-bandwidth low-noise voltage-controlled oscillator (VCO) based on the clock synchronization for Ether net physical layer is studied. A cross-coupled current-hungry type ring oscillator is adopted by VCO. Through cascading 11- stage loop circuit and improving its control voltage converter circuit, the range of VCO output frequency is optimized, the phase noise of output clock is reduced, and the performance index of Ethernet physical layer chip clock circuit is met complete- ly. The results of simulation based on TSMC 3. 3 V 0. 25μm CMOS technology show that the voltage controlled gain is 300 MHz/V at the center frequency of 250 MHz, the range of its linear region coverage is 60-480 MHz, and the phase noise is --108 dBc at the off-center frequency of 600 kHz.

关 键 词:VCO 环形振荡器 电流饥饿型 时钟同步 

分 类 号:TN919-34[电子电信—通信与信息系统]

 

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