改进的多通道数字下变频技术与实现  

Optimized Multi-channel DDC Technology and Its Implementation

作　　者：王韬[1,2] 付连庆[1,2] 杨力生 曹海林[1,2] 

机构地区：[1]重庆大学通信与测控中心,重庆400044 [2]飞行器测控与通信教育部重点实验室,重庆400044

出　　处：《兵工学报》2010年第12期1653-1658,共6页Acta Armamentarii

基　　金：重庆市科技攻关计划项目(CSTC2008BC2001);重庆大学高层次人才科研启动基金项目(0903005104724);中央高校基本科研业务费项目(CDJZR10160012)

摘　　要：多通道数字下变频技术是数字阵列接收机的核心技术,但现有实现方案占用资源较多。针对这个问题,本文研究了一种改进的多通道数字下变频技术。引入1bit量化技术,将正交的正弦波信号量化为对应的方波信号,方波信号只有2个电平,包含了正弦波信号的所有信息。数控振荡器中的查找表可使用一个异或门和一个非门电路取代,混频电路中的2个乘法器可使用2个数据选择器取代,因而简化了多通道数字下变频电路和数字Costas环路设计。使用ISE软件设计了具体的FPGA实现电路,使用ModelSim软件和MatLab软件进行了仿真分析。理论分析和仿真结果表明,与传统方法相比,本文方法在同一片FPGA芯片上可以实现的最大数字下变频通道数可提高40%以上,而系统性能和处理速度保持不变。Multi-channel digital down conversion is the key technology of digital array receiver. However present solutions occupy relatively more resources, so this paper puts forward an optimized method. One bit quantization is introduced, which is used to quantize the orthogonal sine signals of NCO and convert them to square waves. The square waves only have two electrical levels, and include all the signals of sine waves. So the numerical controlled oscillator is simplified by a XOR gate and a NOT gate and also the mix circuits are implemented with two multipliers replaced by two multiplexers, so as to simplify the multi-channel digital down conversion circuits and digital Costas loog design. The FPGA implementation circuit is designed by ISE software, and simulation analysis is also carried out by MatLab and ModelSim software. Compared with conventional methods, the number of digital down conversion channels to be implemented in the same FPGA chip can be improved by more than 40% with the system performance and the operating speed not affected.

关 键 词：通信技术 1bit量化 数字下变频 科斯塔斯环 数字阵列接收机 

分 类 号：TN91[电子电信—通信与信息系统]