一种低复杂度FIR数字陷波器设计方法  

A Complexity Reduction Approach for FIR Notch Filter Design

作　　者：汪洋[1] 曾以成[1] 

机构地区：[1]湘潭大学材料与光电物理学院,湖南湘潭411105

出　　处：《微计算机信息》2011年第2期91-93,共3页Control & Automation

基　　金：基金申请人:汪洋;项目名称:基于FRM技术的低复杂度锐截止FIR滤波器设计;基金颁发部门:湖南省教育厅(08C863);基金申请人:曾以成;项目名称:一种微弱信号的混沌检测新机制研究;基金颁发部门:湖南省自然科学基金委(08JJ5031)

摘　　要：提出一种可降低FIR数字陷波器复杂度的设计结构,陷波器设计被分解为内插点通原型滤波器和掩蔽滤波器的级联,并与一个延迟网络相并联。数值实验表明,与直接设计相比,该法可减少10%～90%的乘法器、加法器使用数量,节省比率与陷波频率所在位置无关,与过渡带宽窄相关,过渡带越窄节省程度越大,但延时略有增加。本文同时给出了子滤波器指标参数的确定方法。A structure for reducing the complexity of FIR digital notch filter is proposed. The structure is composed of two sub-filters and a delay branch. First, an interpolated single point pass prototype filter and a masking filter are cascaded. Then, the cascaded sub-filters are paralleled with the delay network. Numerical experiments show that multipliers and adders used in notch filter can be reduced about 10%～90% compared to direct design, and the saving percentage is related to filter’s transition band width, while the notch frequency is indifferent to it. Even more multipliers and adders can be saved for notch filter with narrower transition band width. The only shortcoming of the proposed approach is that some additional delays are required. The formulae for calculating subfilters’ parameters are also proposed.

关 键 词：FIR陷波器 低复杂度结构 内插原型滤波器 

分 类 号：TN713.7[电子电信—电路与系统]