A 10-bit 80-MS/s opamp-sharing pipelined ADC with a switch-embedded dual-input MDAC  

作　　者：尹睿 廖友春 张卫 唐长文 

机构地区：[1]ASIC & System State Key Laboratory,Fudan University [2]China Ratio Microelectronics Co.,Ltd [3]Ratio Microelectronics Co.Ltd

出　　处：《Journal of Semiconductors》2011年第2期102-107,共6页半导体学报（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(No.60876019);the National S&T Major Project of China(No. 2009ZX0131-002-003-02);the Shanghai Rising-Star Program(No.09QA1400300);the National Scientists and Engineers Service for Enterprise Program,China(No.2009GJC00046);the ASIC State-Key Laboratory Funding,China(No.09MS007)

摘　　要：A 10-bit 80-MS/s opamp-sharing pipelined ADC is implemented in a 0.18μm CMOS. An opamp- sharing MDAC with a switch-embedded dual-input opamp is proposed to eliminate the non-resetting and successive-stage crosstalk problems observed in the conventional opamp-sharing technique. The ADC achieves a peak SNDR of 60.1 dB （ENOB = 9.69 bits） and a peak SFDR of 76 dB, while maintaining more than 9.6 ENOB for the full Nyquist input bandwidth. The core area of the ADC is 1.1 mm2 and the chip consumes 28 mW with a 1.8 V power supply.A 10-bit 80-MS/s opamp-sharing pipelined ADC is implemented in a 0.18μm CMOS. An opamp- sharing MDAC with a switch-embedded dual-input opamp is proposed to eliminate the non-resetting and successive-stage crosstalk problems observed in the conventional opamp-sharing technique. The ADC achieves a peak SNDR of 60.1 dB （ENOB = 9.69 bits） and a peak SFDR of 76 dB, while maintaining more than 9.6 ENOB for the full Nyquist input bandwidth. The core area of the ADC is 1.1 mm2 and the chip consumes 28 mW with a 1.8 V power supply.

关 键 词：pipelined ADC opamp-sharing low power switch-embedded dual-input MDAC 

分 类 号：TN792[电子电信—电路与系统]