Low power mapping for AND/XOR circuits and its application in searching the best mixed-polarity  

作　　者：汪鹏君 李辉 

机构地区：[1]Institute of Circuits and Systems,Ningbo University

出　　处：《Journal of Semiconductors》2011年第2期108-113,共6页半导体学报（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(Nos.61076032,60776022);the Postdoctoral Science Foundation of China(No.20090461355);the Postdoctoral Research Projects of Zhejiang Province,China,and the Natural Science Foundation of Zhejiang Province,China(No.Y1101078)

摘　　要：A low power mapping algorithm for technology independent AND/XOR circuits is proposed. In this algorithm, the average power of the static mixed-polarity Reed-Muller （MPRM） circuits is minimized by generating a two-input gates circuit to optimize the switching active of nodes, and the power and area of MPRM circuits are estimated by using gates from a given library. On the basis of obtaining an optimal power MPRM circuit, the best mixed-polarity is found by combining an exhaustive searching method with polarity conversion algorithms. Our experiments over 18 benchmark circuits show that compared to the power optimization for fixed-polarity Reed-Muller circuits and AND/OR circuits, power saving is up to 44.22% and 60.09%, and area saving is up to 14.13% and 32.72%, respectively.A low power mapping algorithm for technology independent AND/XOR circuits is proposed. In this algorithm, the average power of the static mixed-polarity Reed-Muller （MPRM） circuits is minimized by generating a two-input gates circuit to optimize the switching active of nodes, and the power and area of MPRM circuits are estimated by using gates from a given library. On the basis of obtaining an optimal power MPRM circuit, the best mixed-polarity is found by combining an exhaustive searching method with polarity conversion algorithms. Our experiments over 18 benchmark circuits show that compared to the power optimization for fixed-polarity Reed-Muller circuits and AND/OR circuits, power saving is up to 44.22% and 60.09%, and area saving is up to 14.13% and 32.72%, respectively.

关 键 词：AND/XOR circuits low power mapping MPRM polarity optimization 

分 类 号：TN702[电子电信—电路与系统]