具有浮空埋层的高压器件新结构和击穿电压模型  

A New High Voltage Device with Floating Buried Layer and the Model of Breakdown Voltage

作　　者：李琦[1] 张扬[1] 段吉海[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《固体电子学研究与进展》2011年第1期35-39,共5页Research & Progress of SSE

基　　金：广西自然科学基金资助项目(2010GXNSFB013054);桂林电子科技大学国家自然科学基金资助项目(60961002)

摘　　要：提出具有浮空埋层的变掺杂高压器件新结构(BVLD:Variation in lateral doping with floating buriedlayer),建立其击穿电压模型。线性变掺杂漂移区的电场耦合作用使表面电场达到近似理想的均匀分布,n+浮空等电位层与衬底形成新平行平面结,使得纵向电压由常规结构的一个pn结承受转变为两个串联pn结分担,改善了器件的击穿特性;建立二维的击穿电压模型,获得器件结构参数间的优化关系。结果表明:与常规LDMOS相比,BVLD结构的击穿电压提高94%。A novel high voltage device with variation in lateral doping and floating buried layer（BVLD） is proposed,and a model of breakdown voltage is developed.The surface electric field reaches nearly ideal uniform distribution due to electric field modulation of variation in lateral doping.A new parallel-plane junction is formed between n＋floating buried layer and substrate, which can support more biases by series of two pn junctions.Based on the 2-D model of breakdown voltage,the quantified optimal relation between the structure parameters is also obtained.The results indicate that the breakdown voltage of BVLD device is increased by 94% in comparison to conventional LDMOS.

关 键 词：变掺杂 浮空埋层 调制 模型 

分 类 号：TN432[电子电信—微电子学与固体电子学]