无相位截断误差的DDS设计实现  

None Phase Truncation Error DDS Implementation

作　　者：沈志[1] 王宏远[1] 王振[1] 

机构地区：[1]华中科技大学电子与信息工程系,湖北武汉430074

出　　处：《微电子学与计算机》2011年第3期70-72,76,共4页Microelectronics & Computer

基　　金：高等学校科技创新工程重大项目培育资金资助项目(708065)

摘　　要：通过修改传统的直接数字合成(DDS)设计方法,提出了一种无相位截断误差的DDS设计方案.该方案降低了系统正弦采样存储表的需求空间,减轻了存储量对提高信号精度的限制,消除了传统设计中相位截断给最终输出信号频谱的影响,提高了DDS的性能.该方案可以应用于载波合成,频偏调制等通信信号处理领域,可采用FPGA,DSP,MCU等各种硬件平台予以实现.By modifying the traditional Direct Digital Synthesizer（DDS） design method,a novel solution without phase truncation error is introduced in this paper.It has reduced the storage requirement for the sine-wave samples,eliminated the storage limitation to the signal precision improvement,and avoided the infection which comes from the phase truncation error to the final signal spectrum;consequently,the DDS performance is meliorated.This method is applicable in carrier generation,frequency-offset modulation and some other communication signal processing area,and could be implemented on many hardware platforms such as FPGA,DSP and MCU.

关 键 词：DDS 相位截断 杂散 

分 类 号：TN713[电子电信—电路与系统]