An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays  

作　　者：Zhen-guo MA Feng YU Rui-feng GE Ze-ke WANG 

机构地区：[1]Department of Instrument Engineering, Zhejiang University, Hangzhou 310027, China

出　　处：《Journal of Zhejiang University-Science C(Computers and Electronics)》2011年第4期323-329,共7页浙江大学学报C辑（计算机与电子（英文版）

摘　　要：We present a novel method to implement the radix-2 fast Fourier transform (FFT) algorithm on field programmable gate arrays (FPGA).The FFT architecture exploits parallelism by having more pipelined units in the stages,and more parallel units within a stage.It has the noticeable advantages of high speed and more efficient resource utilization by employing four ganged butterfly engines (GBEs),and can be well matched to the placement of the resources on the FPGA.We adopt the decimation-infrequency (DIF) radix-2 FFT algorithm and implement the FFT processor on a state-of-the-art FPGA.Experimental results show that the processor can compute 1024-point complex radix-2 FFT in about 11 μs with a clock frequency of 200 MHz.We present a novel method to implement the radix-2 fast Fourier transform （FFT） algorithm on field programmable gate arrays （FPGA）. The FFT architecture exploits parallelism by having more pipelined units in the stages, and more parallel units within a stage. It has the noticeable advantages of high speed and more efficient resource utilization by employing four ganged butterfly engines （GBEs）, and can be well matched to the placement of the resources on the FPGA. We adopt the decimation-infrequency （DIF） radix-2 FFT algorithm and implement the FFT processor on a state-of-the-art FPGA. Experimental results show that the processor can compute 1024-point complex radix-2 FFT in about 11 kts with a clock frequency of 200 MHz.

关 键 词：Ganged butterfly engine (GBE) Radix-2 Fast Fourier transform (FFT) Field programmable gate array (FPGA) 

分 类 号：TN91[电子电信—通信与信息系统]