面向性能优化的可重构片上网络技术研究  

Study on Technology for Performance Optimization Oriented Reconfigurable Network-on-Chips

作　　者：陈延仓[1] 谢伦国[1] 李晋文[1] 张民选[1] 

机构地区：[1]国防科技大学计算机学院,长沙410082

出　　处：《微电子学》2011年第2期260-264,共5页Microelectronics

基　　金：国家自然科学基金资助项目(60873212)

摘　　要：片上网络已经成为众核时代最具潜力的片上互连解决方案。然而,现有片上网络灵活性不足,无法支持通信的动态行为。研究具有高度灵活性、适应性和可配置性的可重构片上网络,对于提高复杂应用的通信效率具有重要意义。介绍了可重构片上网络的研究背景和相关研究,提出了一个面向可重构片上网络的系统化研究框架,阐述了可重构片上网络的重要研究点,给出了相关研究结果及实验数据。Network-on-chip（NoC） has been the most promising on-chip interconnection solution in the many-core era.However,due to its insufficient flexibility,the existing NoC cannot support dynamic behaviors of communication.Therefore,it is of great significance to develop reconfigurable NoC with more flexibility,adaptability and configurability for improving the efficiency of complicated applications.In this paper,background of development and relevant research works on reconfigurable NoC were presented.A systematic research framework for reconfigurable NoC was proposed.Major research points for reconfigurable NoC were described,and corresponding experimental results were given.

关 键 词：可重构片上网络 任务映射 网络适配器 硬件级模拟器 

分 类 号：TP302.2[自动化与计算机技术—计算机系统结构]