基于CORDIC算法通用数字调制器的FPGA设计  

Design of general digital modulator based on CORDIC algorithm and FPGA

作　　者：雷能芳[1] 

机构地区：[1]渭南师范学院物理与电子工程系,陕西渭南714000

出　　处：《电子设计工程》2011年第7期68-70,共3页Electronic Design Engineering

基　　金：渭南师范学院重点科研计划项目(09YKF005)

摘　　要：通信系统的振幅键控(ASK)、移频键控(FSK)和移相键控(PSK)是数字调制的3种基本信号形式。而数字调制器载波的产生通常都是基于查找表的方法,为了达到高精度要求,需要耗费大量的ROM资源去建立庞大的查找表。文中提出了一种基于流水线CORDIC算法通用数字调制器的FPGA实现方案,可以有效地节省FPGA的硬件资源,提高运算的速度。文章最后给出了该方案的硬件测试结果,验证了设计的正确性。而且整个系统便于编程、修改以及升级改进。The three basic signal forms of digital modulation are ASK, FSK and PSK in communication system. But the common way to implement digital modulator carrier producing circuit is based on a look-up table method, which requires a huge volume of ROM to achieve high accuracy. This paper porposed a pipelined CORDIC algorithm for the implementation of general digital modulator on FPGA, which can save considerable hardware resources and improve the speed performance as well. Finally, the design was verified by the practical test. And the whole system is easy to program and modify as well as upgrade.

关 键 词：通用调制器 CORDIC算法 流水线 FPGA 

分 类 号：TN911[电子电信—通信与信息系统]