模拟电路MOSFET晶体管失配研究:模型和参数  

Study on MOSFET Mismatch in Analog Circuits:Models and Parameters

作　　者：吕伟锋[1,2] 孙玲玲[2] 

机构地区：[1]浙江大学超大规模集成电路设计研究所,杭州310027 [2]杭州电子科技大学教育部射频电路与系统重点实验室,杭州310018

出　　处：《固体电子学研究与进展》2011年第2期124-129,共6页Research & Progress of SSE

摘　　要：MOSFET晶体管的精确匹配对模拟和混合集成电路最终性能至关重要,因此漏电流失配方差或标准差大小的计算伴随着MOSFET器件特征尺寸的减小一直不断地发展和演进。针对模拟集成电路设计中MOSFET漏电流失配,围绕模型和参数选取这一核心问题进行回顾、分析和总结,并说明其应用。同时研究其最新的进展情况及面临的问题,最后提出了解决失配问题的部分思路。MOSFET transistors＇s exact match is crucial for performance of analog and mixed integrated circuits.So the mismatch calculation of variance or standard deviation for drain current has been constantly developing and evolving associated with the feature size scaling of MOSFET device.This paper mainly deals with the review,analysis and summary of such key problems as models and parameters involved in MOSFET mismatch calculation for analog IC design.Also their changes,the latest progress,problems faced are studied.Finally some ideas to solve them is proposed.

关 键 词：失配 模型 工艺波动 

分 类 号：TN386[电子电信—物理电子学]