PEM系统中可控时钟电路设计的优化  

Controllable Clock Circuit Design In PEM System

作　　者：孙芸华[1,2] 王培林[1,2] 黄欢[1] 胡婷婷[1,2] 丰宝桐[1,2] 帅磊[1,2] 魏书军[1] 李可[1] 赵京伟[1] 魏龙[1] 

机构地区：[1]中国科学院高能物理研究所核分析技术重点实验室,高技术研发中心,北京100049 [2]中国科学院研究生院,北京100049

出　　处：《核电子学与探测技术》2011年第4期411-415,共5页Nuclear Electronics & Detection Technology

摘　　要：介绍了为乳腺专用正电子发射断层扫描仪PEM(Positron Emission Mammography)电子学数据获取(Data Acquisition,DAQ)系统提供稳定、可靠、抗干扰的高精度同步时钟的电路,它采用了基于单片机和高精度时钟产生芯片的电路设计方法,可以得到多路可控时钟信号。设计中采用差分传输,大大降低了时钟信号之间的干扰,同时由于电路引入了CAN总线控制,使得时钟信号可以根据需要被同时输出或者屏蔽。A high - precision synchronized clock circuit design will be presented, which can supply steady, reliable and anti -jamming clock signal for the data acquirement （DAQ） system of Positron Emission Mammogra- phy （PEM）. This circuit design is based on the Single - Chip Microcomputer and high - precision clock chip, and can achieve multiple controllable clock signals. The jamming between the clock signals can be reduced greatly with the differential transmission. Meanwhile, the adoption of CAN bus control in the clock circuit can prompt the clock signals to be transmitted or masked simultaneously when needed.

关 键 词：PEM 可控时钟 CAN控制 

分 类 号：TL81[核科学技术—核技术及应用]