单精度浮点运算单元的FPGA设计与实现  

Design and Implement of Single Precision Floating-Point Unit on FPGA

作　　者：张素萍[1] 李红刚[2] 张慧坚[3] 董定超[3] 

机构地区：[1]天津中德职业技术学院电气工程系,天津300191 [2]天津市光学精密机械研究所,天津300384 [3]中国热带农业科学院科技信息研究所,海南儋州571737

出　　处：《计算机测量与控制》2011年第5期1178-1180,1183,共4页Computer Measurement &Control

基　　金："十一五"国家科技支撑计划项目(2009BADA1B02);海南省自然科学基金资助(809019)

摘　　要：针对以前浮点运算依靠软件实现的弊端,提出采用自顶向下的设计方法,模块化的设计思想来实现FPU整个设计,这种设计方法增强了系统的可移植性及可改进性;系统在CycloneⅡEP2C35FC684C6的FPGA上综合实现,验证结果表明,在满足各项功能要求的前提下,其系统最高时钟频率可达到47.4MHZ,提高了浮点运算单元的处理速度。This paper analyzes the principle and operation process of the floating-point unit;studies the architecture of Floating-Point Unit.To solve the deficiency which FPU design depended on software.We propose a project of the FPU design which is suitable for FPGA.This approach enhances the portability and improvement of the system and higher calculating speed.The design unit is simulated,meeting the requirements of design and realizing logic synthesis in FPGA with the model Cyclone Ⅱ EP2C35F672C6.The result shows that the operating frequency is 47.4MHZ to meet all requirements of the design.

关 键 词：浮点 FPU IEEE754 FPGA 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]